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Intel Makes 22nm 3-D Tri-Gate Tech for Ivy Bridge
GoGeTa006:
Damn. . .that video sure opens eyes. . .
Anyways. . .I keep wondering as these things get smaller and smaller. . .anyone care to explain to me how they actually build it?
I mean to get something that size. . .its probably just some chemical reaction or laser cutting of something. . .I don't know I just cant picture something assembling a transistor that small. . .
kureshii:
When you are your only customer, you have quite a lot of flexibility in deciding your manufacturing processes :)
TSMC and GF have announced the FinFET process only for the 14nm node, since it seems “FinFETs require changes in circuit design (especially analog), tools and IP throughout the whole ecosystem”, and their customers need time to make those changes in their own workflow. So for a whole year and more Intel will be the only x86 fab using FinFET. That’s pretty solid marketing material right there.
--- Quote from: GoGeTa006 on May 07, 2011, 04:25:34 AM ---Anyways. . .I keep wondering as these things get smaller and smaller. . .anyone care to explain to me how they actually build it?
--- End quote ---
http://www.youtube.com/watch?v=_wyEjdoqNkw
GoGeTa006:
--- Quote from: kureshii on May 07, 2011, 05:07:51 AM ---When you are your only customer, you have quite a lot of flexibility in deciding your manufacturing processes :)
TSMC and GF have announced the FinFET process only for the 14nm node, since it seems “FinFETs require changes in circuit design (especially analog), tools and IP throughout the whole ecosystem”, and their customers need time to make those changes in their own workflow. So for a whole year and more Intel will be the only x86 fab using FinFET. That’s pretty solid marketing material right there.
--- Quote from: GoGeTa006 on May 07, 2011, 04:25:34 AM ---Anyways. . .I keep wondering as these things get smaller and smaller. . .anyone care to explain to me how they actually build it?
--- End quote ---
http://www.youtube.com/watch?v=_wyEjdoqNkw
--- End quote ---
thank you I was looking for "how transistors are made" and stuff. . .
TMRNetShark:
--- Quote from: newy on May 06, 2011, 03:33:44 AM ---
--- Quote from: TMRNetShark on May 06, 2011, 12:19:41 AM ---
--- Quote from: mgz on May 05, 2011, 10:58:10 PM ---
--- Quote from: TMRNetShark on May 05, 2011, 08:19:46 PM ---Good... goood... this is all working perfectly into my plan!
Oh yeah, my plan is to some day become a full on cyborg... to become one, I need Moore's Law to grow exponentially faster! I expect by 2045 that I can become fully cyberized and all thanks to corporations like Intel that will make it possible.
--- End quote ---
cuz your gay and want to have hardcore sex with men more often then your weak human body allows you to so your banking on intel
--- End quote ---
Yeah? Well you know what? Oh wait I just lost interest in what you had to say... ::)
ON TOPIC: This will get Intel ahead of the game, but I'm wondering when this technology will hit GPUs and start lowering the amount of heat that are emitted from computers or any other technology that uses transistors. This will definitely increase usage life of CPUs... my question is, why didn't they think of this before? It seems like a simple enough concept, but I guess the technology to make such small circuits hadn't caught up yet.
--- End quote ---
This shows that you have no idea how chip/semi conductor products are made... I advise you to shut up...
What I still remember from my apprenticeship (simplified):
- Wafer (silicon e.g.)
- dope it to create a n- or p-layer (oven process)
- mask that layer
- check for errors in the mask (generally almost every structure to be checked, how many on a 21" wafer? No idea, too many to count for a human)
- etch that masked layer (that's the important step in production)
- next layer
- rinse and repeat the steps above
And now add that new 3d structure to that process and see how complicated it's going to be. Keypoints are the mask and the etching.
EDIT: If metals are needed somewhere in the middle, add another step of phyiscal deposition (sputtering), or an insulating layer/structure by oxidizing in an oven.
EDIT: This does not include the SMD (or old THD) production.
--- End quote ---
How did you get that from what I said? But no, I won't shut up because all I said was what the guy said in the video... So telling me to shut up is funny because it seems like you don't know what you are talking about. Less power needed would mean less heat that is generated. Less heat that is generated means a longer lasting product unless it was really built badly. I don't even see your argument claiming why I'm stupid, but oh well... It's the internet, people aren't always logical.
newy:
You say it's such a simple concept. Do you work in the semi conductor industry? No? Then better shut up? :) I guess even the simplified silicon chip manufacturing was still too complicated. Less power is only possible if one knows how to optimise the production and that is only possible if one knows how production works. And what I listed are just rough steps/milestones in the production... and this starts with the growing of the silicon crystal and ends with the separation of the several transistors from the wafer to be put in a case. Do you know how long that takes? No? Again, read instead of post. Only the steps I mentioned already take several days to weeks. Now combine this and the new 3d structure, how much are the several steps prolonged or how many steps need to be added? Intel knows and has managed to have them ready for market only now.
As I worked (or have been an apprentice) in that industry I'm dying to know how the several steps in that production look like but of course I will never get to know that as I will never be employed at Intel (nor do I have the intention to work in that industry).
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